Design of a Continuous - Time Bandpass Delta - Sigma Modulator
نویسنده
چکیده
An 8th-order continuous-time (CT) bandpass delta-sigma (AZ) modulator has been designed and simulated in a 65 nm CMOS process. This modulator achieves in simulation 25 MHz signal bandwidth at 250 MHz center frequency with a signalto-noise ratio (SNR) of 75.5 dB. The modulator samples at 1 GS/s while consuming 319 mW. On the system level, the feedback topology secures stability for the 8th-order system, achieving a maximinn stable input range of -1.9 dBFS. A 2.5-V/1.2-V dualsupply loop filter with a feed-forward coupling path has been proposed to suppress noise and distortion. On the transistor level, a 5th -order dual-supply feed-forward operational amplifier (op amp) and a 4th-order single-supply feed-forward op amp have been designed to enable high modulator linearity and coefficient accuracy. Thesis Supervisor: Hae-Seiing Lee Title: Professor
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